Cyclic Scheduling with Latencies
We consider in this talk a set of generic tasks constrained by a set of uniform precedence constraints corresponding to a natural generalization of the basic cyclic scheduling problem : the two parameters of any uniform constraints (namely the value and the height) between two tasks may be negative, which allows to tackle a large class of practical applications.
Firstly, we will present an application of this model for the design of embedded systems. Then, we will discuss the possible extensions of the well known results of the basic scheduling problem to this models if the number of processors is not bounded. Lastly, we will present some theoretical and experimental results if all the tasks are executed by a same processor.